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doc . v ers io n : 0. 1 tota l pa g es : 2 7 da te : 20 0 8/ 0 1/ 23 product specification 7.0" color tft-lcd module model name: a070vw04 v3 (part number: 97.07a13.330) < >preliminary specification < >final specification ? 2006 au optronics all rights reserved, do not copy. note: the content of this specification is subject to change . www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 1/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. record of revision version revise date page content 0 2007/12/28 draft. 01 2008/01/23 10; 23; 25 modify led driving condition, optical spec. and reliability test conditions. www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 2/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. contents a. general description ................................ ................................................... ..................... 3 b. features ........................................... ................................................... ............................. 3 c. general information ................................ ................................................... ..................... 4 d. outline dimension.................................. ................................................... ...................... 5 1. tft-lcd module C front view ........................... ................................................... .....................................5 2. tft-lcd module C rear view............................. ................................................... .....................................6 e. electrical specifications .......................... ................................................... .................... 7 1. fpc pin assignment (hrs fh28-60s-0.5sh)............... ................................................... .......................7 2 absolute maximum ratings .................................. ................................................... ...................................9 f. electrical characteristics......................... ................................................... .................. 10 1 tft- lcd typical operation condition (agnd = agnd2 = g nd = ggnd = 0v) ..................................10 2. backlight driving conditions ....................... ................................................... .........................................10 3. ac characteristics .................................... ................................................... .............................................11 4. rgb parallel input timing ........................... ................................................... ..........................................11 5. serial control interface ac characteristic............... ................................................... ............................13 6. register information .................................. ................................................... ............................................14 7. register table (default value) ........................................ ................................................... .......................15 8. register description .................................. ................................................... ............................................15 9. recommended power on register setting ...................... ................................................... ...................18 10. application circuit example........................... ................................................... .....................................19 11. recommended power on/off sequence........................ ................................................... ....................21 g. optical specification (note 1, 2) ................. ................................................... ............ 23 h. reliability test items(note 2) ..................... ................................................... ................ 25 i. packing form....................................... ................................................... ....................... 26 j. recommend gamma voltage & resistor (gamma 2.2)..... ......................................... 27 www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 3/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. a. general description a070vw04 is an amorphous transmissive type tft (thin film transistor) lcd (liquid crystal display). this model is composed of tft-lcd, drive ic, fpc (flexible printed circuit), a nd backlight unit.the timing controller is embedded, so it is easily to design for consumer product. b. features 7-inch display size wvga resolution and stripe dot arrangement built in timing controller led backlight standby mode supported up/down, left/right reversion selection sync + de mode parallel 18/24bits interface support 16 m color supported wide viewing angle rohs compliant green design www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 4/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. c. general information no. item unit specification remark 1 display resolution dot 800rgb(h)480(v) 2 active area mm 152.40(h)91.44(v) 3 screen size inch 7.0(diagonal) 4 pixel pitch mm 0.1905(h)0.1905(v) 5 color configuration -- r. g. b. stripe note 1 6 color depth -- 16.7m colors note 2 7 overall dimension mm 164(h) 103(v) 5.1(t) note 3 8 weight g 153.5 +/- 10% 9 panel surface treatment -- anti-glare 10 display mode -- normally white note 1: below figure shows dot stripe arrangement. note 2: the full color display depends on 24-bit data signal (pin 4~27). note 3: not include blacklight cable and fpc. refer next page to get furt her information. . . ( 1 2 3 .2398 2399 2400) (1 ..480) www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 5/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. d. outline dimension 1. tft-lcd module C front view www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 6/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. 2. tft-lcd module C rear view www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 7/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. e. electrical specifications 1. fpc pin assignment (hrs fh28-60s-0.5sh) pin no symbol i/o description 1 agnd2 p analog ground 2 avdd2 p analog power 3 vdd p digital power 4 r0 i data input (lsb) 5 r1 i data input 6 r2 i data input 7 r3 i data input 8 r4 i data input 9 r5 i data input 10 r6 i data input 11 r7 i data input (msb) 12 g0 i data input (lsb) 13 g1 i data input 14 g2 i data input 15 g3 i data input 16 g4 i data input 17 g5 i data input 18 g6 i data input 19 g7 i data input (msb) 20 b0 i data input (lsb) 21 b1 i data input 22 b2 i data input 23 b3 i data input 24 b4 i data input 25 b5 i data input 26 b6 i data input 27 b7 i data input (msb) 28 dclk i clock input 29 de i data enable signal 30 hsync i horizontal sync input. negative polarity 31 vsync i vertical sync input. negative polarity 32 scl i serial communication clock input 33 sda i serial communication data input 34 csb i serial communication chip select 35 nc -- not connect (please leave it open) www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 8/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 36 vdd p digital power 37 nc -- not connect (please leave it open) 38 gnd p digital ground 39 agnd1 p analog ground 40 avdd1 p analog power 41 vcomin i for external vcom dc input (optional) 42 nc - not connect 43 nc - not connect 44 vcom o connect a capacitor 45 v10 p gamma correction voltage reference 46 v9 p gamma correction voltage reference 47 v8 p gamma correction voltage reference 48 v7 p gamma correction voltage reference 49 v6 p gamma correction voltage reference 50 v5 p gamma correction voltage reference 51 v4 p gamma correction voltage reference 52 v3 p gamma correction voltage reference 53 v2 p gamma correction voltage reference 54 v1 p gamma correction voltage reference 55 nc - not connect 56 vgh p positive power for tft 57 gvcc p digital power 58 vgl p negative power for tft 59 ggnd p digital ground 60 cap c connected to a capacitor i: input pin; p: power pin; g: ground pin; c: capacitor pin www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 9/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 2 absolute maximum ratings item symbol condition min. max. unit remark vcc gnd=0 -0.5 5 v note 1 avdd 1 avdd 2 agnd1=0 agnd2=0 -0.5 15 v note 1 vgh -0.3 40 v note 1 vgl -20 0.3 v note 1 power voltage vgh-vgl ggnd = 0 -- 40 v note 1 input signal voltage v i -0.3 v cc +0.3 v note 1 operating temperature topa -- 0 60 ambient temperature storage temperature tstg -- -10 70 ambient temperature note 1: functional operation should be restricted under normal ambient temperature. www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 10/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. f. electrical characteristics the following items are measured under stable condition and suggested application circ uit. 1 tft- lcd typical operation condition (agnd = agnd2 = gnd = ggnd = 0v) item symbol min. typ. max. unit remark vdd 3.1 3.3 3.6 v note3 i vdd -- 15 20 ma pin3 + pin36 avdd 1 avdd 2 10.5 11 11.5 v note3 i avdd -- 10 20 ma pin2 + pin40 gvcc 3.1 3.3 3.6 v note3 i gvcc -- 0.08 0.15 ma pin57 vgh 17.5 18 18.5 v note3 i vgh -- 0.35 0.5 ma pin56 vgl -7.5 -7 -6.5 v note3 power supply i vgl -- 0.35 0.5 ma pin58 h level v ih 0.7v cc - v cc v input signal l level v il gnd - 0.3v cc v v1 ~ v5 avdd/2 - avdd C 1 v input reference voltage v6 ~ v10 1 - avdd/2 v vcom v cdc 3.3 3.6 3.9 v note 1 note1: above every operation range is based on stable operation from suggested appl ication circuit. note2: based on recommended gamma 2.2 voltage. note3: typical current test pattern 2. backlight driving conditions parameter symbol min. typ. max. unit remark led lightbar current i l 120 140 160 ma --- led light bar voltage v l --- 12 12.5 v --- led life time l l 10,000 --- --- hr note 2, 3 note 1: the led driving condition is defined for led module ( 21 led). the current range will be 120ma to 160ma based on suggested driving voltage set as 12v. www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 11/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. note 2: define led lifetime: brightness is decreased to 50% of the initial value. led lifetime is restricted under normal condition, ambient temperature = 25 and led lightbar voltage = 12v. note 3: if it uses larger led lightbar voltage more than 12v, it maybe decreases the led lifetime. 3. ac characteristics parameter symbol conditions min. typ. max. unit clock high time t wcl 8 - - ns clock low time t wch 8 - - ns clock rising time t rclk - - 1 ns clock falling time t ack - - 1 ns hsync setup time t hsu 5 ns hsync hold time t hhd 10 ns vsync setup time t vsu 0 ns vsync hold time t vhd 2 ns data setup time t dsu 5 ns data hold time t dhd 10 ns data enable set-up time t esu 4 ns data enable hold time t ehd 2 ns hs vs t vpd vih vih vil vil clk rgb, de, hs t ds, t es, t hs vih vih vil vil t dh, t he, t hh t ch t cl figure 1 : input timing details 4. rgb parallel input timing a. horizontal timing parameter symbol conditions min. typ. max unit dclk frequency f dclk 25 33 40 mhz dclk period t dclk 25 30.3 40 ns www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 12/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. parameter symbol conditions min. typ. max unit hsync period (= t hd + t hbl ) t h 986 1056 1183 dclk active area t hd - 800 - dclk horizontal blanking (= t hf + t he ) t hbl 186 256 383 clk hsync front porch t hf 40 - clk delay from hsync to 1 st data input (= t hw + t hb ) t he function of hdl[5..0] settings 146 216 343 dclk hsync pulse width t hw 1 128 136 clk hsync back porch t hb 10 88 342 clk b. vertical timing parameter symbol conditions min. typ. max. unit vsync period (= t vd + t vbl ) t v 497 505 512 th active lines t vd 480 th vertical blanking (= t vf + t ve ) t vbl 17 25 32 th vsync front porch t vf 1 - th gd start pulse delay t ve function of vdl[3..0] settings 16 24 31 hs vsync pulse width t vw 1 3 16 th hsync/ vsync phase shift t vpd 2 320 - clk hs r[7:0] g[7:0] b[7:0] r0 g0 b0 r1 g1 b1 r2 g2 b2 r3 g3 b3 t h t hw t hb t hf t he r n-1 g n-1 b n-1 r n g n b n invalid invalid invalid invalid invalid invalid r n g n b n r n-1 g n-1 b n-1 t hbl t hd dclk figure 2 horizontal input timing. (hv mode) www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 13/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. dclk de t hbl t hd r[7:0] g[7:0] b[7:0] r0 g0 b0 r1 g1 b1 r2 g2 b2 r3 g3 b3 r n-1 g n-1 b n-1 r n g n b n invalid invalid invalid invalid invalid invalid r n g n b n r n-1 g n-1 b n-1 figure 3: horizontal input timing. (de mode) vs hs line t vw xn-1 xn x1 x2 x3 xn-1 xn t v t vf t ve t vbl t h t vf invalid t vd figure 4: vertical timing. (hv mode) de line xn-1 xn x1 x2 x3 xn-1 xn t vbl invalid t vd figure 5: vertical timing. (de mode) 5. serial control interface ac characteristic parameter s ymbol c onditions m in . t yp . m ax . u nit serial clock t sck 320 ns scl pulse duty t scw 40 50 60 % serial data setup time t ist 120 ns serial data hold time t ihd 120 ns serial clock high/low t ssw 120 ns csb setup time t cst 120 ns csb hold time t chd 120 ns chip select distinguish t cd 1 us delay from csb to vsync t cv 1 us www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 14/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. d15 d14 d13 d2 d1 d0 d15 d14 d13 d12 scl sda csb vsync t cst t ist t ihd t ssw t ssw t sck t chd t cd t cv 30% 30% 30% 30% 70% 30% 70% figure 6 : ac serial interface write mode timing 6. register information there is a total of 6 registers each containing several parameters. for a detail ed description of the parameters refer to register table.the serial register has read/write f unction. d[15:12] are the register address, d[11] defines the read or write mode and d[10:0] are the data. figure 7 : serial interface write sequence 1. at power-on, the default values specified for each parameter are taken. 2. if less than 16-bit data are read during the cs low time period, the data is cancelled. a. the write operation is cancelled. 3. all items are set at the falling edge of the vertical sync, except r 0[1:0]. 4. when grb is activated through the serial interface, all registers ar e cleared, except the grb value. 5. the register setting values are valid when vcc already goes to high and after vsync starts. 6. it is suggested that vsync, hsync, dclk always exists in t he same time. but if hsync, dclk stops, only vsync operating, the register setting is still valid. 7. if the chip goes to standby mode, the register value will still keep. mcu can wake up the chip only by changing standby mode value from low to high. 8. the register setting values are rewritten by the influence of static electricity, a noise, etc. to unsuitable value, incorrect operating may occur. it is suggested that the spi interface will setup as frequently as poss ible. www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 15/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 7. register table (default value) address w data reg no . d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 (01) (01) (1) u/d (0) shl (1) (1) (0) grb (1) stb (1) r1 0 0 0 1 0 x (01) vcom_m (01) vcom_lvl (2fh) r2 0 0 1 0 0 x x x hdl(80h) r3 0 0 1 1 0 x x (0) (0) (0) (0) (0) vdl(1000) r4 0 1 0 0 0 x x (0) (0) (00) (1) (1111) r6 0 1 1 0 0 x 0 engb12 (1) engb11 (1) engb10 (1) (0) (0) engb5 (1) engb4 (1) engb3 (1) (0) x : reserved, please set to 0. 8. register description r0 settings address bit description default 0000 [10..0] bits 10-9 auo internal use 01 bits 8-7 auo internal use 01 bit6 auo internal use 1 bit5 (u/d) vertical shift direction selection. 0 bit4 (shl) horizontal shift direction selection. 1 bit3 auo internal use 1 bit2 auo internal use 0 bit1 (grb) global reset. 1 bit0 (stb) standby mode setting. 1 bit5 u/d function 0 scan down; first line=gn gn-1 g2 last line=g1. (default) 1 scan up; first line=g1 g2 gn-1 last line=gn. bit4 shl function 0 shift left; first data=y600 y601 y2 last data=y1. 1 shift right: first data=y1 y2 y600 last data=y600. (default) bit1 grb function 0 the controller is reset. reset all registers to default value. 1 normal operation. (default) www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 16/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. bit0 stb function 0 t-con, source driver and dc-dc converters are off, and all outputs are high -z. 1 normal operation. ( default) r1 settings address bit description default 0001 [9..0] bit9-8 auo internal use 01 bit7-6 (vcom_m) vcom mode signal. 01 bit5-0 (vcom_lvl) vcom level adjustment. step 31.25mv/lsb @avdd=12.5v (avdd/400) 2fh bit7-6 vcom_m function. 00 vcom generator disabled. vcom is generated externally. 01 vcom internal reference disabled. dc voltage of vcom follows vcomi n signal. ( default ) 1x vcom generator enabled. dc voltage of vcom follows vcom_lvl setti ngs. note: please refer to to figure40. bit5-0 vcom_lvl function @v1=12.5v 00h vcom_lvl = v1/2C47*31.25mv = 4.78125v 01h vcom_lvl = v1/2C46*31.25mv = 4.8125v 2fh vcom_lvl = v1/2 = 6.25v ( default ) www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 17/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 3eh vcom_lvl = v1/2+15*31.25mv = 6.71875v 3fh vcom_lvl = v1/2+16*31.25mv = 6.75v r2 settings address bit description default 0010 [7..0] bit7-0 (hdl) horizontal start pulse adjustment function 80h bit7-0 hdl function. 00h t he = t hetyp C 128 clk period. 80h t he = t hetyp . (default) ffh t he = t hetyp + 127 clk period. r3 settings address bit description default 0011 [8..0] bit8 auo internal use 0 bit7 auo internal use 0 bit6 auo internal use 0 bit5 auo internal use 0 bit4 auo internal use 0 bit3-0 (vdl) vertical start pulse adjustment function 1000 bit3-0 vdl function. 0000 t ve = t vetyp C 8 hs period. 0001 t ve = t vetyp C 7 hs period. 0010 t ve = t vetyp C 6 hs period. 0011 t ve = t vetyp C 5 hs period. 0100 t ve = t vetyp C 4 hs period. 0101 t ve = t vetyp C 3 hs period. 0110 t ve = t vetyp C 2 hs period. 0111 t ve = t vetyp C 1 hs period. 1000 t ve = t vetyp . (default) 1001 t ve = t vetyp + 1 hs period. 1010 t ve = t vetyp + 2 hs period. 1011 t ve = t vetyp + 3 hs period. 1100 t ve = t vetyp + 4 hs period. 1101 t ve = t vetyp + 5 hs period. 1110 t ve = t vetyp + 6 hs period. www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 18/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 1111 t ve = t vetyp + 7 hs period. r6 settings address bit description default 0110 [9..0] bit9 auo internal use 0 bit8(engb12) gamma buffer enable for v9 1 bit7(engb11) gamma buffer enable for v8 1 bit6(engb10) gamma buffer enable for v7 1 bit5 auo internal use 0 bit4 auo internal use 0 bit3(engb5) gamma buffer enable for v4 1 bit2(engb4) gamma buffer enable for v3 1 bit1(engb3) gamma buffer enable for v2 1 bit0 auo internal use 0 bitx engbx function 0 gamma buffer for vx is disable (high z). 1 gamma buffer is enable. vx must be connected externally. 9. recommended power on register setting address r/w data reg no . d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 01 01 1 0 1 0 0 1 1 r1 0 0 0 1 0 0 01 01 2fh r2 0 0 1 0 0 0 0 0 80h r3 0 0 1 1 0 0 0 0 0 0 0 0 1000 r4 0 1 0 0 0 0 0 1 1 00 1 1111 r6 0 1 1 0 0 0 0 1 1 1 0 0 1 1 1 0 www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 19/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. 10. application circuit example (note: for reference only, not limited to this circ uit) /rdy 1 fb1 2 comp 3 in 4 gnd 5 ref 6 fb2 7 fb3 8 ct 16 sw 15 pgnd 14 in3 13 gh 12 in2 11 gl 10 en 9 u401 mp1530 c421 0.1uf/25v/x5r/0603 r415 no(0/5%/0603) r427 110k/1%/0603 r413 100k/5%/0603 r418 10k/1%/0603 r419 0/5%/0603 fb_3 r412 0/5%/0603 r426 10k/1%/0603 vgh r433 261/5%/0603 c415 0.1uf/25v/x5r/0603 r423 5.1k/1%/0603 r430 0/5%/0603 c420 22nf/50v/x5r/0603 1 2 d405 no(rb551v-30) c418 10uf/10v/x5r/0805 c429 2.2uf/25v/x5r/0805 c426 1uf/35v/x5r/0603 r422 0/5%/0603 en 1 3 2 d404 sb07-03c fb_1 r429 10/1%/0603 k 2 a 1 c 3 dm407 dan217u r425 78k/1%/0603 k 2 a 1 c 3 dm405 dan217u c423 27pf/50v/x5r/0402 r428 24k/1%/0603 c413 0.1uf/25v/x5r/0603 c416 2.2uf/35v/x5r/0805 c425 0.1uf/25v/x5r/0603 l402 cxlp100-100(10uh) cxlp100 r424 0/5%/0603 c428 27pf/50v/x5r/0603 r420 56k/1%/0603 c424 0.1uf/25v/x5r/0603 3.3v c422 2.2uf/35v/x5r/0805 fb_2 k 2 a 1 c 3 dm408 dan217u r421 10/1%/0603 c430 22uf/16v/x5r/1206 r414 6.8k/5%/0603 vgl k 2 a 1 c 3 dm406 dan217u r431 5.1k/5%/0603 c417 0.1uf/10v/x5r/0402 c427 2.2uf/35v/x5r/0805 r432 0/5%/0603 r417 10k/1%/0603 c414 1uf/35v/x5r/0603 avdd c419 10nf/50v/x5r/0603 +11v -7v +18v 3.3v www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 20/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transforme d to any other forms without permission from au optronics corp. r316 v4 r307 c306 1uf/16v/x5r/0603 r301 avdd v3 r324 0/5%/0603 c302 0.1uf/16v/x5r/0402 v10 vr301 evm3rsx50b14 avdd c323 0.1uf/16v/x5r/k/0402 r325 0/5%/0603 c307 1uf/16v/x5r/0603 r310 r323 0/5%/0603 r322 c308 1uf/16v/x5r/0603 r308 vcom r321 c305 1uf/16v/x5r/0603 r314 c309 1uf/16v/x5r/0603 c303 1uf/16v/x5r/0603 v6 v5 v1 r311 r305 r302 v8 3 4 2 5 1 + - u301a no(ad8565) c310 1uf/16v/x5r/0603 r315 r320 v2 r306 v9 c311 1uf/16v/x5r/0603 vcomin v7 avdd r318 r515 0/5%/0603 c322 1uf/16v/x5r/0603 r309 r313 r317 r312 c304 1uf/16v/x5r/0603 r319 c324 10uf/10v/x5r/k/0805 r303 r304 r516 no(10k/5%/0603) c301 10uf/16v/x5r/1206 3.3v vgl vgh scl csb g6 r7 b7 r0 b1 dgnd 3.3v b5 r6 v8 v3 r2 sda r4 v6 g5 b4 g4 de v9 v4 3.3v r3 g1 dgnd g0 vcomin g3 r1 c505 10uf/10v/x5r/k/0805 b3 b6 avdd avdd b0 v1 v7 b2 g2 v10 dgnd vs r5 vcom hs v2 v5 g7 dclk agnd2 1 avdd2 2 vdd 3 r0 4 r1 5 r2 6 r3 7 r4 8 r5 9 r6 10 r7 11 g0 12 g1 13 g2 14 g3 15 g4 16 g5 17 g6 18 g7 19 b0 20 b1 21 b2 22 b3 23 b4 24 b5 25 b6 26 b7 27 dclk 28 de 29 hsy nc 30 vsy nc 31 scl 32 sda 33 csb 34 nc 35 vdd 36 nc 37 gnd 38 agnd1 39 avdd1 40 vcomin 41 nc 42 nc 43 vcom 44 v10 45 v9 46 v8 47 v7 48 v6 49 v5 50 v4 51 v3 52 v2 53 v1 54 nc 55 vgh 56 gvcc 57 vgl 58 ggnd 59 cap 60 con60 c506 10uf/10v/x5r/k/0805 vcom www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 21/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 11. recommended power on/off sequence power on sequence www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 22/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. power off sequence vcc gnd vcc 90% 0% led gnd vled 90% 0% avdd vgl vgh gnd gnd gnd avdd vgl vgh vcc 90% 0% serial interface > 10us 0% 100% vsync digital input gnd vcc vcc gnd gnd > 0us >80ms 90% 90% 90% 0% 0% 0% 0% 90% > 0us www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 23/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. --------------------------- ---- g. optical specification (note 1, 2) item symbol condition min. typ. max. unit remark response time rise fall tr tf =0 - - 12 18 20 30 ms ms note 3 contrast ratio cr at optimized viewing angle 200 300 - note 4 viewing angle top bottom left right cr 10 R 30 50 50 50 50 65 65 65 - - - - deg. note 5 brightness y l =0 150 200 - cd/m 2 note 6 x =0 0.26 0.31 0.36 white chromaticity y =0 0.28 0.33 0.38 note 1:ambient temperature =25 , and led lightbar voltage v l = 12 v. to be measured in the dark room. note 2:to be measured on the center area of panel with a viewing cone of 1 by topcon luminance meter bm-7, after 15 minutes operation. note 3. definition of response time: the output signals of photo detector are measured when the input signals are changed from black to white(falling time) and from white to black(rising time), respectiv ely. the response time is defined as the time interval between the 10% and 90% of amplit udes. refer to figure as below. note 4.definition of contrast ratio: s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 24/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. contrast ratio is calculated with the following formula. contrast ratio (cr)= note 5. definition of viewing angle, , refer to figure as below. note 6. measured at the center area of the panel when all the input terminals of lcd panel are electrically opened. photo detector output when lcd is at white state photo detector output when lcd is at black state www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 25/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. h. reliability test items(note 2) no. test items conditions remark 1 high temperature storage ta= 70 240hrs 2 low temperature storage ta= -10 240hrs 3 high ttemperature operation ta= 60 240hrs 4 low temperature operation ta= 0 240hrs 5 high temperature & high humidity ta= 50 . 80% rh 240hrs operation 6 heat shock -10 ~60 , 50 cycle, 2hrs/cycle non-operation 7 electrostatic discharge 200v,200pf(0?), once for each terminal non-operation frequency range : 10~55hz stoke : 1.5mm sweep : 10~55~10hz 2 hours for each direction of x,y,z 8 vibration total 6 hours non-operation jis c7021, a-10 9 mechanical shock 100g . 6ms, x,y,z 3 times for each direction non-operation jis c7021, a-7 condition c 10 vibration (with carton) random vibration: 0.015g 2 /hz from 5~200hz C6db/octave from 200~500hz iec 68-34 11 drop (with carton) height: 60cm 1 corner, 3 edges, 6 surfaces note 1: ta: ambient temperature. note 2: note 2: in the standard conditions, there is not display function ng issue occurred. all the cosmetic specification is judged before the reliability stress. www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 26/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. i. packing form (???P ) (? 30pcs) (?? 5pcs) ) (??B 7) www.datasheet.co.kr datasheet pdf - http://www..net/
version: 0.1 page: 27/27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. j. recommend gamma voltage & resistor (gamma 2.2) gamma 2.2 avdd 11 00h v1 10 10h v2 8.8 20h v3 8.2 30h v4 7.77 3fh v5 6.9 3fh v6 4.1 30h v7 3.23 20h v8 2.8 10h v9 2.2 00h v10 1 www.datasheet.co.kr datasheet pdf - http://www..net/

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